Wednesday, April 22, 2015

DARPA Semiconductor Starnet beyond CMOS research targets ten thousands times power improvement

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The DARPA Semiconductor Technology Advanced Research Network (STARNet) program is a government-industry partnership combining the expertise and resources from select defense, semiconductor, and information companies with those of DARPA to sponsor an external set of academic research teams that are focused on specific technology needs set by experts in industry and government. Efforts under this program will remove the roadblocks to achieving performance needed for future sensing, communication, computing, and memory applications. The program involves close collaboration between these experts and the academic base with industry providing 60% of program funding matched by 40% from DARPA.

Research in STARNet is divided into a discovery thrust (ACCEL) and an integration thrust (NEXT) executed by virtual academic centers and focused on combining current or emerging technologies to provide new capabilities. ACCEL seeks to discover new material systems, devices, and novel computing/sensing architectures. NEXT involves projects on advanced analog and mixed signal circuitry, complex system design tools, and alternative computing architectures. As the projects in ACCEL mature, it is expected that they will replace the efforts in NEXT that are based on current standard technologies for integrated circuits.

Goals
Technical goals proposed by Centers including

* including reductions of 100 times in the power consumption of devices
* 100 - 10,000 times lower energy consumption in logic switches
* 10 - 100 times higher computational energy efficiency, scalability of technologies to sub-10 nanometer dimensions, development of novel computing architectures
* highly energy-efficient information processing systems inspired in the nervous system.



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Reposted via Next Big Future

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